MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 213

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

7.3.11 PWM SMx Value Register 3 (PWM_SMnVAL3)
Addresses: PWM_SM0VAL3 – F300h base + Bh offset = F30Bh
7.3.12 PWM SMx Fractional Value Register 4 (PWM_SMnFRACVAL4)
Addresses: PWM_SM0FRACVAL4 – F300h base + Ch offset = F30Ch
Freescale Semiconductor
Reset
Reset
Read
Read
Write
Write
FRACVAL4
Bit
Bit
15–11
VAL3
15–0
Field
Field
15
15
0
0
PWM_SM1VAL3 – F300h base + 3Bh offset = F33Bh
PWM_SM2VAL3 – F300h base + 6Bh offset = F36Bh
PWM_SM1FRACVAL4 – F300h base + 3Ch offset = F33Ch
PWM_SM2FRACVAL4 – F300h base + 6Ch offset = F36Ch
14
14
0
0
Value Register 3
The 16-bit signed value in this buffered, read/write register defines the count value to set PWM23 low.
This register is not byte accessible.
NOTE: The VAL3 register is buffered. The value written does not take effect until MCTRL[LDOK] is set
Fractional Value 4
These bits act as a fractional addition to the value in the VAL4 register which controls the PWMB turn on
timing. It is also used to control the fractional addition to the turn off delay of PWMA when
MCTRL[IPOLx]=1 in complementary mode, CTRL2[INDEP]=0.
NOTE: The FRACVAL4 register is buffered. The value written does not take effect until MCTRL[LDOK]
FRACVAL4
13
13
0
0
and the next PWM load cycle begins or CTRL[LDMOD] is set. VAL3 cannot be written when
MCTRL[LDOK] is set. Reading VAL3 reads the value in a buffer and not necessarily the value
the PWM generator is currently using.
is set and the next PWM load cycle begins or CTRL[LDMOD] is set. FRACVAL4 cannot be
12
12
0
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
PWM_SMnFRACVAL4 field descriptions
PWM_SMnVAL3 field descriptions
11
11
0
0
Table continues on the next page...
10
10
0
0
0
0
9
9
Preliminary
Chapter 7 Enhanced Flex Pulse Width Modulator (eFlexPWM)
0
0
8
8
VAL3
Description
Description
0
0
7
7
0
0
6
6
0
0
0
5
5
0
0
4
4
0
0
3
3
0
0
2
2
0
0
1
1
0
0
0
0
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