MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 536

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Introduction
536
• System bus clocks with pipeline holdoff support
• System clocks for non-pipelined interfaces
• Peripheral clocks including high speed option for TMRs, and SCIs
• ITCK clock to the DSC core TAP interface
• Power saving clock gating for peripherals.
• Three power modes (run, wait, stop) to control power utilization
• Controls with write protection to enable/disable the DSC core WAIT and STOP
• Controls to permit selected peripherals to run in stop mode to generate stop recovery
• Controls for programmable peripheral and GPIO connections
• Manages internal reset deassertion sequence
• Software initiated reset
instructions.
interrupts.
• Data RAM clock with holdoff control
• Program flash clock with holdoff support
• IP bus interface clock with holdoff control
• HFM IP bus interface clock and PCLK
• DSC core system clock
• General-purpose system clock (both standard and inverted versions)
• PCLK clock for DSC core
• NCLK clock for DSC core
• A continuously running system clock
• A continuously running system clock with enable for HFM
• Stop mode shuts down DSC core, system clock, and peripheral clock.
• Wait mode shuts down DSC core, and unnecessary system clock operation.
• Run mode supports full part operation
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
Preliminary
Freescale Semiconductor