MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 616

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Functional Description
20.3.7 Flash User Mode Illegal Operations
The ACCERR flag is set during the command write sequence if any of the following
illegal operations are performed. Such operations cause the command sequence to abort
immediately. Writes to the flash array address space occur through the CPU program
memory write instructions and not through the register set accesses.
The PVIOL flag is set during the command-write sequence if any of the following illegal
operations are performed. Such operations cause the command sequence to abort
immediately.
If a flash block is read during execution of an algorithm on that block (that is, CCIF is
low), the read returns invalid data; meanwhile, the ACCERR flag does not set if the BTS
bit = 0.
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• Writing to the flash array address space before initializing FM_CLKDIV.
• Writing to the flash array address space while CBEIF is not set.
• Writing a second word to the flash array address space.
• Writing an invalid user command to the command register.
• Writing to any flash register other than the command register after writing a word to
• Writing a second command to the command register before executing the previously
• Writing to any flash register other than the user status register (to clear CBEIF) after
• The device enters stop or wait mode and a command is in progress. The command is
• Aborting a command sequence by writing a 0 to the CBEIF flag after the word write
• Writing to the flash array while a calculate data signature command is running.
• Writing a flash array address to program in a protected area.
• Writing a flash array address to erase in a protected area.
• Writing a mass erase command to the command register while any protection is
the flash array address space.
written command.
writing to the command register.
aborted.
to the flash address space or after writing a command to the command register and
before the command is launched.
enabled (see the description of the HFM protection register).
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
Preliminary
Freescale Semiconductor