MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 196

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Memory Map and Registers
7.3
Register details appear in these groups:
The base address of submodule 0 is the same as the base address for the PWM module as
a whole. The base address of submodule 1 is equal to the base address of submodule 0
plus the offset 30h. The base address of submodule 2 is equal to the base address of
submodule 1 plus an additional 30h offset, and so on for the base address of submodule 3.
Submodule register names contain SM0, SM1, SM2, or SM3 to designate the applicable
submodule.
196
offset (hex)
Address
1. Register descriptions for submodules 0, 1, and 2 appear together, as a single group.
2. Submodule 3's register descriptions appear separately because its registers vary from
3. The final set of configuration registers, based at an offset of C0h, applies to the entire
0
1
2
3
4
5
6
Each of these submodules has an identical register set.
those of submodules 0, 1, and 2.
PWM peripheral. Some of these registers contain bitfields for configuring an
individual submodule, while other registers affect all submodules at once. This final
register set also includes fault channel registers.
Memory Map and Registers
PWM_SM0CNT
PWM_SM0INIT
SM0FRACVAL
Register
SM0CTRL2
SM0CTRL
SM0VAL0
Reserved
name
PWM_
PWM_
PWM_
PWM_
1
R
W
R
W
R
W
R
W
R
W
R
W
R
W
15
15
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
14
14
LDFQ
FRACVAL1
13
13
12
12
Preliminary
11
11
10
10
INIT_SEL
9
9
DT
Reserved
8
8
VAL0
CNT
INIT
0
7
7
FORC
0
E
6
6
PRSC
FORCE_SEL
0
5
5
4
4
Freescale Semiconductor
0
3
3
2
2
CLK_SEL
0
1
1
0
0