MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 332

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Memory Map and Registers
10.3.9 I2C Address Register 2 (I2Cx_ADDR2)
Addresses: I2C0_ADDR2 – F210h base + 8h offset = F218h
332
Reset
Read
Write
Bit
Reserved
Reserved
SHTF2IE
SHTF2
15–8
Field
Field
SAD
7–1
2
0
0
15
0
I2C1_ADDR2 – F220h base + 8h offset = F228h
14
0
This read-only bit sets when SCL and SDA are held high more than clock × LoValue / 512, which
indicates the bus is free. This bit is cleared automatically.
0
1
SCL high timeout flag 2
This bit sets when SCL is held high and SDA is held low more than clock × LoValue/512. Software clears
this bit by writing a 1 to it.
0
1
SHTF2 interrupt enable
Enables SCL high and SDA low timeout interrupt.
0
1
This read-only bitfield is reserved and always has the value zero.
SMBus address
Contains the slave address used by the SMBus. This field is used on the device default address or other
related addresses.
This read-only bit is reserved and always has the value zero.
No SCL high and SDA high timeout occurs
SCL high and SDA high timeout occurs
No SCL high and SDA low TIMEOUT occurs
SCL high and SDA low TIMEOUT occurs
Disabled
Enabled
13
0
I2Cx_SMB_CSR field descriptions (continued)
12
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
0
11
0
I2Cx_ADDR2 field descriptions
10
0
0
9
Preliminary
0
8
Description
Description
1
7
1
6
0
5
SAD
0
4
0
3
Freescale Semiconductor
0
2
1
1
0
0
0