MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 455

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

The timer value, which is used for stamping, is taken from a free running internal CAN
bit clock. A timer overrun is not indicated by the MSCAN. The timer is reset (all bits set
to 0) during initialization mode. The CPU can only read the time stamp registers.
Read: Anytime when TXEx flag is set (see the section “MSCAN Transmitter Flag
Register (CANTFLG)” in this chapter) and the corresponding transmit buffer is selected
in CANTBSEL (see the section “MSCAN Transmit Buffer Selection Register
(CANTBSEL)” in this chapter).
Write: Unimplemented
Address: CAN_RXFG_TSRH – F440h base + 2Eh offset = F46Eh
13.3.30 Receive Buffer Time Stamp Register - Low Byte
If the TIME bit is enabled, the MSCAN will write a time stamp to the respective registers
in the active transmit or receive buffer right after the EOF of a valid message on the CAN
bus (see the section “MSCAN Control Register 0 (CANCTL0)” in this chapter). In case
of a transmission, the CPU can only read the time stamp after the respective transmit
buffer has been flagged empty.
The timer value, which is used for stamping, is taken from a free running internal CAN
bit clock. A timer overrun is not indicated by the MSCAN. The timer is reset (all bits set
to 0) during initialization mode. The CPU can only read the time stamp registers.
Read: Anytime when TXEx flag is set (see the section “MSCAN Transmitter Flag
Register (CANTFLG)” in this chapter) and the corresponding transmit buffer is selected
in CANTBSEL (see the section “MSCAN Transmit Buffer Selection Register
(CANTBSEL)” in this chapter).
Freescale Semiconductor
Reset
Read
Write
Bit
TSR[15:8]
Reserved
15–8
Field
7–0
15
0
(CAN_RXFG_TSRL)
14
0
This read-only bitfield is reserved and always has the value zero.
Time Stamp Register Bits 15-8
13
0
12
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
0
CAN_RXFG_TSRH field descriptions
11
0
10
0
Chapter 13 Freescale's Scalable Controller Area Network (MSCAN)
0
9
Preliminary
0
8
Description
0
7
0
6
0
5
TSR[15:8]
0
4
0
3
0
2
0
1
0
0
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