MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 215

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

7.3.15 PWM SMx Value Register 5 (PWM_SMnVAL5)
Addresses: PWM_SM0VAL5 – F300h base + Fh offset = F30Fh
Freescale Semiconductor
Reset
Read
Write
FRACVAL5
Bit
Reserved
15–11
VAL5
10–0
15–0
Field
Field
15
0
PWM_SM1VAL5 – F300h base + 3Fh offset = F33Fh
PWM_SM2VAL5 – F300h base + 6Fh offset = F36Fh
14
0
Fractional Value 5
These bits act as a fractional addition to the value in the VAL5 register which controls the PWMB turn off
timing. It is also used to control the fractional addition to the turn on delay of PWMa when
MCTRL[IPOLx]=1 in complementary mode, CTRL2[INDEP]=0
NOTE: The FRACVAL5 register is buffered. The value written does not take effect until MCTRL[LDOK]
NOTE: FRCTRL[FRAC45_EN] should be set to 0 when the values of VAL4 and VAL5 cause the high or
This read-only bitfield is reserved and always has the value zero.
Value Register 5
The 16-bit signed value in this buffered, read/write register defines the count value to set PWM45 low.
This register is not byte accessible.
NOTE: The VAL5 register is buffered. The value written does not take effect until MCTRL[LDOK] is set
13
0
is set and the next PWM load cycle begins or CTRL[LDMOD] is set. FRACVAL5 cannot be
written when MCTRL[LDOK] is set. Reading FRACVAL5 reads the value in a buffer and not
necessarily the value the PWM generator is currently using.
low time of the PWM output to be 3 cycles or less.
and the next PWM load cycle begins or CTRL[LDMOD] is set. VAL5 cannot be written when
MCTRL[LDOK] is set. Reading VAL5 reads the value in a buffer and not necessarily the value
the PWM generator is currently using.
12
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
PWM_SMnFRACVAL5 field descriptions
PWM_SMnVAL5 field descriptions
11
0
10
0
0
9
Preliminary
Chapter 7 Enhanced Flex Pulse Width Modulator (eFlexPWM)
0
8
VAL5
Description
Description
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
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