MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 609

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

20.2.10 HFM Test Array Signature (HFM_TST_SIG)
This read-only register stores the flash information block signature that was generated by
the RDARYMI command during factory test. At any time during the life of the part,
execute the RDARYMI command and compare the result with the value in this register to
confirm that the IFR data has not been compromised.
The register's reset state is loaded from the flash array during reset.
Address: HFM_TST_SIG – F400h base + 1Dh offset = F41Dh
* Notes:
•
20.3 Functional Description
The embedded flash memory module consists of a data array that is mapped into program
memory space and a set of control and status registers that is mapped into data memory
space. Data array read operations are formed by using 56800E program memory read
instructions. The 56800E data-memory access instructions are used to access the control
and status register set. Data array write and erase operations are formed by (in this
sequence) using 56800E program-memory access instructions, writing a command to the
command register, and writing a 1 to the CBEIF bit in the flash user status register.
Freescale Semiconductor
Reset
Read
Write
TST_AREA_SIG
x = Undefined at reset.
IFR_OPT0
Bit
Reserved
15–10
15–0
Field
Field
9–0
15
x*
14
x*
This bitfield is reserved.
Trim value of on-chip relaxation oscillator
TST_AREA_SIG bits
13
x*
12
x*
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
HFM_IFR_OPT0 field descriptions
11
x*
HFM_TST_SIG field descriptions
10
x*
x*
9
Preliminary
TST_AREA_SIG
x*
8
Description
Description
x*
7
x*
6
x*
5
Chapter 20 Flash Memory (HFM)
x*
4
x*
3
x*
2
x*
1
x*
0
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