MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 292

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Functional Description
requests allowing software to calculate new PWM parameters in real time. When
INTEN[RIE] is not set, reloads still occur at the selected reload rate without generating
CPU interrupt requests.
7.4.3.4 Reload Errors
Whenever one of the VALx, FRACVALx, or CTRL[PRSC] registers is updated, the
STS[RUF] flag is set to indicate that the data is not coherent. STS[RUF] will be cleared
by a successful reload which consists of the reload signal while MCTRL[LDOK] is set. If
STS[RUF] is set and MCTRL[LDOK] is clear when the reload signal occurs, a reload
error has taken place and STS[REF] is set. If STS[RUF] is clear when a reload signal
asserts, then the data is coherent and no error will be flagged.
7.4.3.5 Initialization
Initialize all registers and set MCTRL[LDOK] before setting MCTRL[RUN].
The PWM generator uses the last values loaded if MCTRL[RUN] is cleared and then set
while MCTRL[LDOK] equals zero.
When MCTRL[RUN] is cleared:
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• The STS[RF] flag and pending CPU interrupt requests are not cleared
• All fault circuitry remains active
Even if MCTRL[LDOK] is not set, setting MCTRL[RUN] also
sets the STS[RF] flag. To prevent a CPU interrupt request, clear
INTEN[RIE] before setting MCTRL[RUN].
PWM RELOAD
WRITE 1 TO RF
Figure 7-239. PWMF Reload Interrupt Request
RESET
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
V
DD
D
CLK
Preliminary
CLR
Note
Q
RIE
RF
CPU INTERRUPT
REQUEST
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