MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 278

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Functional Description
7.4.2.8 Deadtime Insertion Logic
The following figure shows the deadtime insertion logic of each submodule which is used
to create non-overlapping complementary signals when not in independent mode.
While in the complementary mode, a PWM pair can be used to drive top/bottom
transistors, as shown in the figure. When the top PWM channel is active, the bottom
PWM channel is inactive, and vice versa.
278
DBLPWM
from Force
PWM23
PWM45
Out logic
To avoid short circuiting the DC bus and endangering the
transistor, there must be no overlap of conducting intervals
between top and bottom transistor. But the transistor's
characteristics may make its switching-off time longer than
switching-on time. To avoid the conducting overlap of top and
bottom transistors, deadtime needs to be inserted in the
switching period, as illustrated in the following figure.
DBLEN
1
0
1
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
IPOL
Figure 7-225. Deadtime Insertion Logic
1
0
falling
detect
detect
rising
edge
edge
Preliminary
Note
start
start
DTCNT1
DTCNT0
counter
counter
down
down
zero
zero
Freescale Semiconductor
INDEP
1
0
1
0
PWM23
to Output
PWM45
logic