MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 557

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

16.2.21 GPIO Peripheral Select Register 0 (SIM_GPS0)
GPIO with only 1 peripheral function do not require a GPS field. That peripheral function
is always enabled when the PER field of the corresponding GPIO is set to 1.
Address: SIM_GPS0 – F0E0h base + 15h offset = F0F5h
Freescale Semiconductor
Reset
Read
Write
Bit
Reserved
GIPSP
PCEP
13–12
Field
Field
3–2
1–0
C7
C6
15
14
15
0
0
C7
14
0
10
11
Peripheral Clock Enable Protection
Enables write protection of all fields in the PCEn, SDn, and PCR registers.
GPIO and Internal Peripheral Select Protection
Enables write protection of GPSn registers in the SIM. GIPSP also write protects external registers,
including all XBAR, GPIO_X_PER, GPIO_X_PPMODE, GPIO_X_DRIVE, and GPIO_X_IFE registers if
present.
00
01
10
11
This read-only bit is reserved and always has the value zero.
Configure GPIO C7
0
1
Configure GPIO C6
00
01
10
11
Function = SS0_B; Peripheral = SPI0; Direction = IO
Function = TXD0; Peripheral = SCI0; Direction = IO
Write protection off and locked until device reset.
Write protection on and locked until device reset.
Write protection off (default).
Write protection on.
Write protection off and locked until device reset.
Write protection on and locked until device reset.
13
Function = TA2; Peripheral = TMRA; Direction = IO
Function = XB_IN3; Peripheral = XBAR; Direction = IN
Function = CMPREF; Peripheral = HSCMP A/B/C; Direction = AN-IN
Reserved
0
C6
12
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
SIM_PROT field descriptions (continued)
11
0
0
SIM_GPS0 field descriptions
Table continues on the next page...
C5
10
0
0
0
9
Preliminary
C4
0
8
Description
Description
0
7
C3
0
6
Chapter 16 System Integration Module (SIM)
0
5
C2
0
4
0
3
0
0
2
0
1
C0
0
0
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