MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 383

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257MLH

Manufacturer Part Number
MC56F8257MLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257MLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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11.7.1.4 Receive Error Interrupt
The receive error interrupt is enabled by setting CTRL1[REIE]. This interrupt indicates
that the receiver detected any of the errors reflected by the following conditions:
The interrupt service routine should read the STAT register to determine which of the
error flags was set. The error flag is cleared by writing (anything) to the STAT register.
Then software should take the appropriate action to handle the error condition.
11.7.2 Recovery from Wait and Stop Mode
Any enabled SCI interrupt request can bring the DSC core out of wait mode or stop mode
(if the SCI module is enabled in stop mode).
Freescale Semiconductor
• Noise flag (STAT[NF]) set
• Parity error flag (STAT[PF]) set
• Framing error flag (STAT[FE]) set
• Overrun flag (STAT[OR]) set
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
Preliminary
Chapter 11 Queued Serial Communications Interface (QSCI)
383

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