MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 465

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257MLH

Manufacturer Part Number
MC56F8257MLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257MLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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remains able to transmit messages while the receiver FIFO being filled, but all incoming
messages are discarded. As soon as a receive buffer in the FIFO is available again, new
valid messages will be accepted.
13.4.3 Identifier Acceptance Filter
The MSCAN identifier acceptance registers define the acceptable patterns of the standard
or extended identifier (ID[10:0] or ID[28:0]). Any of these bits can be marked 'don't care'
in the MSCAN identifier mask registers.
A filter hit is indicated to the application software by a set receive buffer full flag (RXF =
1) and three bits in the CAN_IDAC register. These identifier hit flags (IDHIT[2:0])
clearly identify the filter section that caused the acceptance. They simplify the application
software's task to identify the cause of the receiver interrupt. If more than one hit occurs
(two or more filters match), the lower hit has priority.
A very flexible programmable generic identifier acceptance filter has been introduced to
reduce the CPU interrupt loading. The filter is programmable to operate in four different
modes (see Bosch CAN 2.0A/B protocol specification):
Freescale Semiconductor
• Two identifier acceptance filters, each to be applied to:
• Four identifier acceptance filters, each to be applied to
• The full 29 bits of the extended identifier and to the following bits of the CAN
• The 11 bits of the standard identifier plus the RTR and IDE bits of the CAN
2.0B frame:
2.0A/B messages
2.0B compliant extended identifier. This figure shows how the first 32-bit filter
bank (CAN_IDAR0–CAN_IDAR3, CAN_IDMR0–CAN_IDMR3) produces a
filter 0 hit. Similarly, the second filter bank (CAN_IDAR4–CAN_IDAR7,
CAN_IDMR4–CAN_IDMR7) produces a filter 1 hit.
6. Although this mode can be used for standard identifiers, it is recommended to use the four or eight identifier
• Remote transmission request (RTR)
• Identifier extension (IDE)
• Substitute remote request (SRR)
acceptance filters for standard identifiers
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
6
. This mode implements two filters for a full length CAN
Chapter 13 Freescale's Scalable Controller Area Network (MSCAN)
Preliminary
465

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