MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 330

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Memory Map and Registers
10.3.7 I2C Programmable Input Glitch Filter register (I2Cx_FILT)
Addresses: I2C0_FILT – F210h base + 6h offset = F216h
10.3.8 I2C SMBus Control and Status Register (I2Cx_SMB_CSR)
330
Reset
Read
Write
Bit
Reserved
Reserved
15–8
Field
FLT
7–3
2–0
15
0
I2C1_FILT – F220h base + 6h offset = F226h
14
0
A master assumes that the bus is free when detecting the clock
and data signals being high for greater than high time out
period. However, SHTF1 rises in bus transmission process with
idle bus state.
When TCKSEL is set, there is no meaning to monitor SHTF1
since the bus speed is too high to match the protocol of SMBus.
This read-only bitfield is reserved and always has the value zero.
This read-only bitfield is reserved and always has the value zero.
I2C programmable filter factor
Controls the width of the glitch (in terms of bus clock cycles) that the filter must absorb. In other words,
the filter does not allow to pass any glitch whose size is less than or equal to this width setting.
0x0
0x1-7
13
0
No filter/bypass
Filter glitches up to width of n bus clock cycles, where n=1-7
12
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
0
11
0
I2Cx_FILT field descriptions
10
0
0
9
Preliminary
NOTE
NOTE
0
8
Description
0
7
0
6
0
0
5
0
4
0
3
Freescale Semiconductor
0
2
FLT
0
1
0
0