MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 355

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

11.3.2 QSCI Control Register 1 (QSCIx_CTRL1)
Read: anytime
Write: anytime
Addresses: QSCI0_CTRL1 – F1E0h base + 1h offset = F1E1h
Freescale Semiconductor
Reset
Read
Write
Bit
LOOP
SWAI
Field
Field
15
14
15
0
QSCI1_CTRL1 – F1F0h base + 1h offset = F1F1h
SWAI
14
0
The FRAC_SBR field can only be used when SBR is greater than 1. Therefore, the value of the divider
can be 1.000 or (with fractional values) in the range from 2.000 to 8191.875. The formula for calculating
the baud rate is:
Baud rate = peripheral bus clock / (16 * (SBR + (FRAC_SBR / 8)))
NOTE: The baud rate generator is disabled until CTRL1[TE] or CTRL1[RE] is set for the first time after
NOTE: If CTRL2[LINMODE] is set, the value of this register is automatically adjusted to match the data
Loop Select
This bit enables loop operation. In loop operation the RXD pin is disconnected from the SCI, and the
transmitter output goes into the receiver input. Both the transmitter and the receiver must be enabled to
use the internal loop function as opposed to single wire operation, which requires only one or the other to
be enabled.
The receiver input is determined by CTRL1[RSRC]. The transmitter output is controlled by CTRL1[TE]. If
CTRL1[TE] is set and CTRL1[LOOP]=1, the transmitter output appears on the TXD pin. If CTRL1[TE] is
clear and CTRL1[LOOP]=1, the TXD pin is high-impedance.
0
1
1
Stop in Wait Mode
This bit disables the SCI in wait mode
RSR
Normal operation, regardless of the value of RSRC
When RSRC = 0: Loop mode with internal TXD fed back to RXD
When RSRC = 1: Single-wire mode with TXD output fed back to RXD
13
C
0
reset. The baud rate generator is disabled when RATE[SBR] and RATE[FRAC_SBR] = 0.
rate of the LIN master device. Reading this register yields the auto-baud value set.
QSCIx_RATE field descriptions (continued)
12
M
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
11
0
QSCIx_CTRL1 field descriptions
Table continues on the next page...
POL
10
0
PE
0
9
Preliminary
PT
Chapter 11 Queued Serial Communications Interface (QSCI)
0
8
Description
Description
TEIE
0
7
TIIE
0
6
RFIE REIE
0
5
0
4
TE
0
3
RE
0
2
RWU
0
1
SBK
0
0
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