MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 358

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Memory Map and Registers
11.3.3 QSCI Control Register 2 (QSCIx_CTRL2)
Read: anytime
Write: anytime
Addresses: QSCI0_CTRL2 – F1E0h base + 2h offset = F1E2h
358
Reset
Read
Write
Bit
RFCNT
TFCNT
TFWM
15–13
12–11
10–8
Field
15
0
QSCI1_CTRL2 – F1F0h base + 2h offset = F1F2h
TFCNT
14
0
Transmit FIFO Count
These read only bits show how many words are used in the TX FIFO. Writes to DATA cause
CTRL2[TFCNT] to increment. As words are pulled for transmission, CTRL2[TFCNT] decrements.
Attempts to write new data to DATA are ignored when CTRL2[TFCNT] indicates the FIFO is full (4 words).
000
001
010
011
100
101
110
111
Transmit FIFO Empty Water Mark
These bits set the TX FIFO word count level at which STAT[TDRE] is set. If CTRL2[FIFO_EN] is clear
(FIFO disabled), then this field is forced to 00 and STAT[TDRE] is set when there is no word in the
transmit buffer.
00
01
10
11
Receive FIFO Count
These read only bits show how many words are used in the RX FIFO. As words are received,
CTRL2[RFCNT] is incremented. As words are read from DATA the value of CTRL2[RFCNT] decrements.
There is one word time to read DATA between when STAT[RDRF] is set (interrupt asserted), due to the
RX FIFO being full, and when an overflow condition is flagged.
13
TDRE is set when 0 words are in the FIFO
TDRE is set when 1 or fewer words are in the FIFO
TDRE is set when 2 or fewer words are in the FIFO
TDRE is set when 3 or fewer words are in the FIFO
0
0 words in Tx FIFO
1 word in Tx FIFO
2 words in Tx FIFO
3 words in Tx FIFO
4 words in Tx FIFO
Reserved
Reserved
Reserved
12
0
TFWM
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
11
0
QSCIx_CTRL2 field descriptions
Table continues on the next page...
10
0
RFCNT
0
9
Preliminary
0
8
Description
0
7
RFWM
0
6
0
5
0
0
4
0
3
Freescale Semiconductor
0
2
0
0
1
0
0