MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 308

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Memory Map and Registers
9.2.2 GPIO Data Register (GPIOx_DR)
This register holds data that comes either from the pin or the data bus. In other words, the
register is the data interface between the pin and the data bus.
Data written to this register appears on the pins if the pins are configured as GPIO output.
Data read from this register is the same as the read state on the pins if those pins are
configured as GPIO input.
Addresses: GPIOA_DR – F140h base + 1h offset = F141h
9.2.3 GPIO Data Direction Register (GPIOx_DDR)
This read/write register configures the state of the pin as either input or output when the
pin is configured as GPIO (the corresponding bit in the GPIO peripheral enable register is
set to zero). When the register is set to zero, the pin is an input. When the register is set to
one, the pin is an output.
308
Reset
Read
Write
Bit
15–0
Field
D
15
0
GPIOB_DR – F150h base + 1h offset = F151h
GPIOC_DR – F160h base + 1h offset = F161h
GPIOD_DR – F170h base + 1h offset = F171h
GPIOE_DR – F180h base + 1h offset = F181h
GPIOF_DR – F190h base + 1h offset = F191h
14
0
Data Bits
13
0
12
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
11
0
GPIOx_DR field descriptions
10
0
0
9
Preliminary
0
8
D
Description
0
7
0
6
0
5
0
4
0
3
Freescale Semiconductor
0
2
0
1
0
0