R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 884

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 22 Serial I/O with FIFO (SIOF)
22.4.4
Transmit/Receive Data: Writing and reading of transmit/receive data is performed for the
following registers.
• Transmit data writing: SITDR (32-bit access)
• Receive data reading: SIRDR (32-bit access)
Figure 22.5 shows the transmit/receive data and the SITDR and SIRDR bit alignment.
Note: In the figure, only the shaded areas are transmitted or received as valid data. Therefore,
Monaural or stereo can be specified for transmit data by the TDLE bit and TDRE bit in SITDAR.
Monaural or stereo can be specified for receive data by the RDLE bit and RDRE bit in SIRDAR.
To achieve left and right same audio output while stereo is specified for transmit data, specify the
TLREP bit in SITDAR. Table 22.8 and table 22.9 show the audio mode specification for transmit
data and that for receive data, respectively.
Rev.1.00 Dec. 13, 2005 Page 832 of 1286
REJ09B0158-0100
access must be made in byte units for 8-bit data, and in word units for 16-bit data. Data in
unshaded areas is not transmitted or received.
Register Allocation of Transfer Data
(a) 16-bit stereo data
(b) 16-bit monaural data
(c) 8-bit monaural data
(d) 16-bit stereo data (left and right same audio output) data
31
31
31
31
Figure 22.5 Transmit/Receive Data Bit Alignment
Data
L-channel data
24 23
24 23
24 23
24 23
Data
Data
16 15
16 15
16 15
16 15
R-channel data
8 7
8 7
8 7
8 7
0
0
0
0