R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 703

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

17.6.2
The sequence when the system power supply is turned off is shown below.
Figure 17.1 shows the sequence of a transition to the self-refresh mode to turn off the system
power supply.
(A) Confirm that all transactions of the DDRIF by on-chip peripheral modules are completed.
(B) Issue the all bank precharge command (PREALL) with bits SMS2 to SMS0 in SCR by
(C) Specify the DRE and RMODE bits in MIM of the DDRIF to put the SDRAM into the self-
(D) The SELFS bit in MIM is set to 1.
(E) Drive the BKPRST signal from high to low. Immediately after the system power supply is
(F) Turn off the system power supply (1.25 V and 3.3 V).
After the system power supply is turned on, the CKE output may remain unstable until the
software. Activated banks will be closed. After that, issue the auto-refresh command (REFA)
with bits SMS in SCR to perform refresh on all rows.
refresh mode. At this time, keep the DCE bit set to 1. The self-refresh command will be
automatically issued and the CKE signal will be driven to low by the DDRIF. After that, the
DDR-SDRAM will automatically enter the power-down mode.
turned off, the CKE output may be unstable. Before turning off the system power supply, use
the external BKPRST signal to keep the CKE signal input of the DDR-SDRAM low until
canceling the power-on reset as shown in figure 17.1.
Note that in the transition from auto-refresh state to self-refresh state, the current auto-refresh
state should have been finished or been disabled before the transition.
clock is supplied after the LSI power supply has become stable. Use the external BKPRST
signal to keep the CKE signal input of the DDR-SDRAM low until canceling the power-on
reset as shown in figure 17.1.
DDR-SDRAM Backup Sequence when Turning Off System Power Supply
Rev.1.00 Dec. 13, 2005 Page 651 of 1286
Section 17 Power-Down Mode
REJ09B0158-0100