R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 314

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 10 Interrupt Controller (INTC)
Note: When the 4-bit encoded interrupt inputs are to be used, write B'1111 to the IM [03:00] or IM
• Interrupt mask register 1 (INTMSK1)
Rev.1.00 Dec. 13, 2005 Page 262 of 1286
REJ09B0158-0100
Initial value:
Initial value:
Bit
23 to 0
Bit
31
30
29 to 24 
23 to 0
R/W:
R/W:
Bit:
Bit:
[07:04] bits to mask single-pin interrupts in the ranges IRQ/IRL [3:0] or IRQ/IRL [7:4],
respectively.
Name
Name
IM10
IM11

IM10 IM11
R/W
31
15

R
1
0
R/W
30
14

R
1
0
Initial
Value
1
1
All 1
All 0
29
13


R
R
1
0
Initial
Value
All 0
28
12


R
R
1
0
R/W
R
R/W
R/W
R/W
R
R
27

11

R
R
1
0
26
10


R
R
1
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Description
Mask setting for all IRL3 to
IRL0 interrupt requests
when pins IRQ/IRL3 to
IRQ/IRL0 operate as a
level-encoded interrupt
input.
Mask setting for all IRL7 to
IRL4 interrupt requests
when pins IRQ/IRL7 to
IRQ/IRL4 operate as a
level-encoded interrupt
input.
Reserved
These bits are always read as 1. The write value
should always be 1.
Reserved
These bits are always read as 0. The write value
should always be 0.
25


R
R
1
9
0
24


R
R
1
8
0
23


R
R
0
7
0
22


R
R
0
6
0
21


R
R
0
5
0
[When reading]
0: The interrupts are
1: The interrupts are
[When writing]
0: No effect
1: Masks the interrupts
20


R
R
0
4
0
masked.
accepted.
19


R
R
0
3
0
18


R
R
0
2
0
17


R
R
0
1
0
16


R
R
0
0
0