R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 858
R8A77800ANBGAV
Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77800ANBGV.pdf
(1342 pages)
Specifications of R8A77800ANBGAV
Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 22 Serial I/O with FIFO (SIOF)
22.3.3
SICTR is a 16-bit readable/writable register that sets the SIOF operating state.
Rev.1.00 Dec. 13, 2005 Page 806 of 1286
REJ09B0158-0100
Initial value:
Bit
15
14
13 to 10 —
R/W:
Bit:
Control Register (SICTR)
Bit Name
SCKE
FSE
SCKE FSE
R/W
15
0
R/W
14
0
13
—
R
0
Initial
Value
0
0
All 0
12
—
R
0
R/W
R/W
R/W
R
11
—
R
0
10
—
R
0
Description
Serial Clock Output Enable
This bit is valid in master mode.
0: Disables the SIOF_SCK output (outputs 0)
1: Enables the SIOF_SCK output
If this bit is set to 1, the SIOF initializes the baud rate
generator and initiates the operation. At the same time,
the SIOF outputs the clock generated by the baud rate
generator to the SIOF_SCK pin.
Frame Synchronous Signal Output Enable
This bit is valid in master mode.
0: Disables the SIOF_SYNC output (outputs 0)
1: Enables the SIOF_SYNC output
If this bit is set to 1, the SIOF initializes the frame
counter and initiates the operation.
Reserved
These bits are always read as 0. The write value should
always be 0.
TXE
R/W
0
9
RXE
R/W
8
0
—
R
7
0
—
R
6
0
—
R
5
0
—
R
4
0
—
R
3
0
—
R
2
0
TXRST
R/W
1
0
RXRST
R/W
0
0
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