R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 11

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 1 Overview................................................................................................1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
Section 2 Programming Model ............................................................................33
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Section 3 Instruction Set ......................................................................................51
3.1
3.2
3.3
Section 4 Pipelining .............................................................................................73
4.1
4.2
4.3
Section 5 Exception Handling .............................................................................97
5.1
SH7780 Features.................................................................................................................... 1
Block Diagram ....................................................................................................................... 9
Pin Arrangement .................................................................................................................. 10
Pin Functions ....................................................................................................................... 11
Memory Address Map ......................................................................................................... 27
SuperHyway Bus ................................................................................................................. 30
SuperHyway Memory (SuperHyway RAM)........................................................................ 31
Data Formats........................................................................................................................ 33
Register Descriptions ........................................................................................................... 34
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
Memory-Mapped Registers.................................................................................................. 46
Data Formats in Registers .................................................................................................... 47
Data Formats in Memory ..................................................................................................... 48
Processing States.................................................................................................................. 49
Usage Note........................................................................................................................... 50
2.7.1
Execution Environment ....................................................................................................... 51
Addressing Modes ............................................................................................................... 53
Instruction Set ...................................................................................................................... 57
Pipelines............................................................................................................................... 73
Parallel-Executability........................................................................................................... 84
Issue Rates and Execution Cycles........................................................................................ 87
Summary of Exception Handling......................................................................................... 97
Privileged Mode and Banks .................................................................................... 34
General Registers.................................................................................................... 37
Floating-Point Registers.......................................................................................... 38
Control Registers .................................................................................................... 40
System Registers..................................................................................................... 42
Notes on self-modified codes.................................................................................. 50
Contents
Rev.1.00 Dec. 13, 2005 Page ix of l