R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 51

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Table 31.2
Table 31.3
Table 31.4
Table 31.5
Table 31.6
Table 31.7
Table 31.8
Table 31.9
Table 31.10
Table 31.11
Table 31.12
Table 31.13
Table 31.14
Table 31.15
Table 31.16
Table 31.17
Table 31.18
Table 31.19
Table 31.20
Table 31.21
Table 31.22
Appendix
Table F.1
Table F.2
Table F.3
Table F.4
Table F.5
Table F.6
Table G.1
Table G.2
Table I.1
Table J.1
DC Characteristics (T
Permissible Output Currents ............................................................................... 1159
Clock Timing ...................................................................................................... 1159
Clock and Control Signal Timing ....................................................................... 1160
Control Signal Timing ........................................................................................ 1163
Bus Timing ......................................................................................................... 1164
DDRIF Signal Timing ........................................................................................ 1182
INTC Module Signal Timing.............................................................................. 1186
Clock Operating Modes with External Pin Combination.................................... 1256
Area 0 Memory Map and Bus Width.................................................................. 1256
Endian ................................................................................................................. 1256
PCI Mode............................................................................................................ 1257
Clock Input ......................................................................................................... 1257
Mode Control...................................................................................................... 1257
Pin states in Reset, Power-Down State, and Bus-Released State........................ 1258
Treatment of Unused Pins................................................................................... 1267
Register Configuration........................................................................................ 1276
SH7780 Product Lineup...................................................................................... 1277
PCIC Signal Timing (in PCIREQ/PCIGNT Non-Port Mode) (1)................... 1188
DMAC Module Signal Timing ....................................................................... 1190
TMU Module Signal Timing .......................................................................... 1191
CMT Module Signal Timing .......................................................................... 1192
SCIF Module Signal Timing........................................................................... 1193
SIOF Module Signal Timing .......................................................................... 1195
HSPI Module Signal Timing .......................................................................... 1199
MMCIF Module Signal Timing...................................................................... 1201
HAC Interface Module Signal Timing............................................................ 1203
SSI Interface Module Signal Timing .............................................................. 1205
FLCTL Module Signal Timing ....................................................................... 1207
GPIO Signal Timing ....................................................................................... 1211
H-UDI Module Signal Timing........................................................................ 1212
a
= −20 to 75°C / −40 to 85°C)......................................... 1156
Rev.1.00 Dec. 13, 2005 Page xlix of l