R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 798

IC SUPERH MPU ROMLESS 449-BGA

R8A77800ANBGAV

Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77800ANBGAV

Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 21 Serial Communication Interface with FIFO (SCIF)
Rev.1.00 Dec. 13, 2005 Page 746 of 1286
REJ09B0158-0100
Bit
3
2
1
0
Bit Name
STOP
CKS1
CKS0
0
Initial
Value
0
0
0
R/W
R/W
R
R/W
R/W
Description
Stop Bit Length
In asynchronous mode, selects 1 or 2 bits as the stop
bit length. The stop bit setting is valid only in
asynchronous mode. Since the stop bit is not added in
clocked synchronous mode, the STOP bit setting is
invalid.
0: 1 stop bit*
1: 2 stop bits*
In reception, only the first stop bit is checked,
regardless of the STOP bit setting. If the second stop
bit is 1, it is treated as a stop bit; if it is 0, it is treated as
the start bit of the next transmit character.
Note: 1. In transmission, a single 1-bit (stop bit) is
Reserved
This bit is always read as 0. The write value should
always be 0.
Clock Select 1 and 0
These bits select the clock source for the on-chip baud
rate generator. The clock source can be selected from
Pck, Pck/4, Pck/16, and Pck/64, according to the
setting of bits CKS1 and CKS0.
For details of the relationship between clock sources,
bit rate register settings, and baud rate, see
section21.3.8, Bit Rate Register n (SCBRR).
00: Pck clock
01: Pck/4 clock
10: Pck/16 clock
11: Pck/64 clock
Note: Pck = Peripheral Clock
2. In transmission, two 1-bits (stop bits) are
added to the end of a transmit character
before it is sent.
added to the end of a transmit character
before it is sent.
1
2

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