R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 236
R8A77800ANBGAV
Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77800ANBGV.pdf
(1342 pages)
Specifications of R8A77800ANBGAV
Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 7 Memory Management Unit (MMU)
7.6.1
The ITLB address array is allocated to addresses H'F200 0000 to H'F2FF FFFF in the P4 area. An
address array access requires a 32-bit address field specification (when reading or writing) and a
32-bit data field specification (when writing). Information for selecting the entry to be accessed is
specified in the address field, and VPN, V, and ASID to be written to the address array are
specified in the data field.
In the address field, bits [31:24] have the value H'F2 indicating the ITLB address array and the
entry is specified by bits [9:8]. As only longword access is used, 0 should be specified for address
field bits [1:0].
In the data field, bits [31:10] indicate VPN, bit [8] indicates V, and bits [7:0] indicate ASID.
The following two kinds of operation can be used on the ITLB address array:
1. ITLB address array read
2. ITLB address array write
Rev.1.00 Dec. 13, 2005 Page 184 of 1286
REJ09B0158-0100
VPN, V, and ASID are read into the data field from the ITLB entry corresponding to the entry
set in the address field.
VPN, V, and ASID specified in the data field are written to the ITLB entry corresponding to
the entry set in the address field.
ITLB Address Array
Address field
Data field
Figure 7.12 Memory-Mapped ITLB Address Array
31
31
1 1 1 1 0 0
VPN:
V:
E:
*:
Virtual page number
Validity bit
Entry
Don't care
1 0
24
23
* * * * * * * * * * * * *
VPN
ASID:
:
Address space identifier
Reserved bits (write value should be 0,
and read value is undefined )
10 9 8 7
10 9
9 8 7
E
V
* * * * * *
ASID
2 1
0 0
0
0
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