R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 1141

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

28.2.27 Port J Pull-Up Control Register (PJPUPR)
PJPUPR is an 8-bit readable/writable register that individually controls the pull-up for this port.
Each bit of this register corresponds to port J (PJ5 to PJ0), and when these pins are set to the on-
chip modules, the pull-up control is performed individually. However, if these pins are set to the
GPIO in the PJCR, the setting in this register is invalid.
Note: n = 5 to 0
Bit
7, 6
5
4
3
2
1
0
Bit Name
—
PJ5PUPR
PJ4PUPR
PJ3PUPR
PJ2PUPR
PJ1PUPR
PJ0PUPR
Initial value:
Initial
value
All 1
1
1
1
1
1
1
R/W:
Bit:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
7
1
R/W
—
6
1
Description
Reserved
These bits are always read as 1, and the write value
should always be 1.
Pull-up control of the pins of Port J can be set
individually.
0: PJn pull-up off
1: PJn pull-up on
PUPR
R/W
PJ5
5
1
PUPR
R/W
PJ4
4
1
PUPR
R/W
PJ3
3
1
Rev.1.00 Dec. 13, 2005 Page 1089 of 1286
PUPR
R/W
PJ2
2
1
Section 28 General Purpose I/O (GPIO)
PUPR
R/W
PJ1
1
1
PUPR
R/W
PJ0
0
1
REJ09B0158-0100