R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 329

IC SUPERH MPU ROMLESS 449-BGA

R8A77800ANBGAV

Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77800ANBGAV

Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
10.3.10 Interrupt Source Register (INT2A0: Not affected by Mask States)
INT2A0 is a 32-bit read-only register that indicates interrupt states of interrupt source modules
regardless of the corresponding mask states. Even if interrupt masking is set in the interrupt mask
register, corresponding bits in INT2A0 indicate source modules for which interrupt conditions
have been satisfied (the corresponding interrupt is not generated). When sources that are masked
should not be indicated, use INT2A1.
Table 10.6 shows the correspondence between bits in INT2A0 and sources.
Table 10.6 Correspondence between Bits in INT2A0 and Sources
Initial value:
Initial value:
Bit
31 to
26
25
24
23
22
21
20
R/W:
R/W:
Bit:
Bit:
Initial
Value
All 0
31
15
R
R
0
R/W Source
R
R
R
R
R
R
R
30
14
R
R
0
(Reserved)
GPIO
FLCTL
SSI
MMCIF
HSPI
SIOF
29
13
R
R
0
28
12
R
R
0
27
11
R
R
0
0
Function
These bits are always read
as 0. The write value
should always be 0.
Indicates GPIO interrupt
source
Indicates FLCTL interrupt
source
Indicates SSI interrupt
source
Indicates MMC interrupt
source
Indicates HSPI interrupt
source
Indicates SIOF interrupt
source
26
10
R
R
0
0
25
R
R
9
24
R
R
8
23
R
R
7
Rev.1.00 Dec. 13, 2005 Page 277 of 1286
22
R
R
6
0
Section 10 Interrupt Controller (INTC)
21
R
R
5
Description
Indicates interrupt sources for
the individual peripheral
modules (INT2A0 is not
affected by the state of the
interrupt mask register).
0: No interrupt
1: An interrupt has been
Note: Interrupt sources can
generated
20
R
R
4
also be identified by
directly reading the
INTEVT code that is
sent to the CPU. In this
case, reading INT2A0
is not necessary.
19
R
R
3
REJ09B0158-0100
18
R
R
2
17
R
R
1
16
R
R
0

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