R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 495
R8A77800ANBGAV
Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77800ANBGV.pdf
(1342 pages)
Specifications of R8A77800ANBGAV
Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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The PCI controller (PCIC) controls the PCI bus for data transfers between memory connected to
an external bus and a PCI device connected to the PCI bus. The ability to connect PCI devices
facilitates the design of systems using the PCI bus and enables more compact systems capable of
faster data transfer.
The PCIC functions as a bus bridge which connects an external PCI bus to the internal
SuperHyway bus. It provides a device connected to the external PCI bus with a channel for access
to the on-chip modules connected to the SuperHyway bus. The PCIC supports both the host bus
bridge mode and normal mode (non-host mode). In host busbridge mode, PCI bus arbitration
control is available and in normal mode, arbitration is executed by the external PCI bus arbiter.
13.1
The PCIC has the following features:
• Supports subset of PCI Local Bus Specification Revision 2.2
• PCI bus operating speeds of 33 MHz/66 MHz
• 32-bit data bus
• PCI master and target functions
• Supports subset of PCI power management Revision 1.1
• Supports the host bus bridge mode and normal mode (selectable by MODE6 pin settings)
• Supports the PCI bus arbiter (in host bus bridge mode)
• Supports configuration mechanism #1 (in host bus bridge mode)
• Supports burst transfer
• Parity check and error report
Supports four external masters
Pseudo-round-robin or fixed priority arbitration
Supports external bus arbiter mode
Features
Section 13 PCI Controller (PCIC)
Rev.1.00 Dec. 13, 2005 Page 443 of 1286
Section 13 PCI Controller (PCIC)
REJ09B0158-0100
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