R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 323

IC SUPERH MPU ROMLESS 449-BGA

R8A77800ANBGAV

Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77800ANBGAV

Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
10.3.7
NMIFCR is a 32-bit readable and conditionally writable register that has an NMI flag (NMIFL bit)
which can be read or cleared by software. The NMIFL bit is automatically set to 1 by hardware
when an NMI interrupt is detected by the INTC. Writing 0 to the NMIFL bit clears it.
The value of the NMIFL bit does not affect acceptance of the NMI by the CPU. Although an NMI
request detected by the INTC is cleared when the CPU accepts the NMI, the NMIFL bit is not
cleared automatically. Even if 0 is written to the NMIFL bit before the NMI request is accepted by
the CPU, the NMI request is not canceled.
Initial value:
Initial value:
Bit
31
30 to 17 —
R/W:
R/W:
Bit:
Bit:
NMI Flag Control Register (NMIFCR)
Name
NMIL
NMIL
31
15
R
R
0
30
14
R
R
0
0
Initial
Value
Undefined R
All 0
29
13
R
R
0
0
28
12
R
R
0
0
27
11
R
R
0
0
R/W
R
26
10
R
R
0
0
Description
NMI Input Level
Indicates the level of the signal input to the NMI pin;
that is, this bit is read to determine the level on the NMI
pin. This bit cannot be modified.
0: The low level is being input to the NMI pin
1: The high level is being input to the NMI pin
Reserved
These bits are always read as 0. The write value
should always be 0.
25
R
R
0
9
0
24
R
R
0
8
0
23
R
R
0
7
0
Rev.1.00 Dec. 13, 2005 Page 271 of 1286
22
R
R
0
6
0
Section 10 Interrupt Controller (INTC)
21
R
R
0
5
0
20
R
R
0
4
0
19
R
R
0
3
0
REJ09B0158-0100
18
R
R
0
2
0
17
R
R
0
1
0
NMIFL
R/(W)
16
R
0
0
0

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