R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 873

IC SUPERH MPU ROMLESS 449-BGA

R8A77800ANBGAV

Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77800ANBGAV

Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
22.3.10 FIFO Control Register (SIFCTR)
SIFCTR is a 16-bit readable/writable register that indicates the area available for the
transmit/receive FIFO transfer.
Initial value:
Bit
15 to 13 TFWM[2:0]
12 to 8
R/W:
Bit:
Bit Name
TFUA[4:0]
R/W
15
0
TFWM[2:0]
R/W
14
0
R/W
13
0
Initial
Value
000
10000
12
R
1
R/W
R/W
R
11
R
0
TFUA[4:0]
10
R
0
Description
Transmit FIFO Watermark
000: Issue a transfer request when 16 stages of the
001: Setting prohibited
010: Setting prohibited
011: Setting prohibited
100: Issue a transfer request when 12 or more stages
101: Issue a transfer request when 8 or more stages of
110: Issue a transfer request when 4 or more stages of
111: Issue a transfer request when 1 or more stages of
Transmit FIFO Usable Area
Indicate the number of words that can be transferred by
the CPU or DMAC as 00000 (full) to 10000 (empty).
R
9
0
A transfer request to the transmit FIFO is issued by
the TDREQE bit in SISTR.
The transmit FIFO is always used as 16 stages of
the FIFO regardless of these bit settings.
transmit FIFO are empty.
of the transmit FIFO are empty.
the transmit FIFO are empty.
the transmit FIFO are empty.
transmit FIFO are empty.
R
8
0
R/W
7
0
RFWM[2:0]
Rev.1.00 Dec. 13, 2005 Page 821 of 1286
R/W
6
0
Section 22 Serial I/O with FIFO (SIOF)
R/W
5
0
R
4
0
R
3
0
RFUA[4:0]
REJ09B0158-0100
R
2
0
R
1
0
R
0
0

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