R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 733

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

19.3.1
CMTCFG is a 32-bit readable/writable register. The possible operations for a pin are timer
compare, timer input capture, up or down count, and capture input, where one pin is used for
capture while the second is used to enable the count.
Initial value:
Initial value:
Bit
31 to 17 —
16
15 to 12 —
R/W:
R/W:
Bit:
Bit:
Configuration Register (CMTCFG)
Bit Name
ROT0
31
15
—
—
R
R
0
0
30
14
—
—
R
R
0
0
29
13
—
—
R
R
0
0
Initial
Value
All 0
0
All 0
28
12
—
—
R
R
0
0
R/W
R/W
R/W
R
R
27
11
—
R
0
0
ED1
R/W
26
10
—
R
0
0
Description
Channel 0,1 Rotation Enable
Reserved
These bits are always read as 0. The write value should
always be 0.
[Updown-counter mode (T01 = 11)]
0: Counting up by CMT_CTR0 signal, counting down by
1: Rotary mode operation by CMT_CTR[1:0] signal
[Other than updown-counter mode]
Clear this bit to 0.
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W
25
—
CMT_CTR1 signal
(Then the settings of ED0 and ED1 are invalid)
R
0
9
0
ED0
R/W
24
—
R
0
8
0
23
—
—
R
R
0
7
0
Rev.1.00 Dec. 13, 2005 Page 681 of 1286
Section 19 Compare Match Timer (CMT)
22
—
—
R
R
0
6
0
FRTM
R/W
21
—
R
0
5
0
20
—
—
R
R
0
4
0
19
—
—
R
R
0
3
0
REJ09B0158-0100
18
—
—
R
R
0
2
0
R/W
17
—
R
0
1
0
T01
ROT0
R/W
R/W
16
0
0
0