R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 391

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Bit
15
14 to 12 IWRRS
11, 10
Bit Name

BST
Initial
Value
0
111
01
R/W
R
R/W
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Idle Cycles between Read-Read to Same Space
Specify the number of idle cycles to be inserted after an
access to a memory connected to the space is
completed. The target cycles are read-read cycles to
the same space. For details, see section 11.5.8, Wait
Cycles between Accesses.
000: No idle cycle inserted
001: 1 idle cycle inserted
010: 2 idle cycles inserted
011: 3 idle cycles inserted
100: 4 idle cycles inserted
101: 5 idle cycles inserted
110: 6 idle cycles inserted
111: 7 idle cycles inserted
Burst Length
When a burst ROM interface is used, these bits specify
the number of accesses in a burst. The MPX interface
is not affected.
00: 4 consecutive accesses (Can be used with 8-, 16-,
01: 8 consecutive accesses (Can be used with 8-, 16-,
10: 16 consecutive accesses (Can be used with 8-, or
11: 32 consecutive accesses (Can be used with 8-bit
or 32-bit bus width)
or 32-bit bus width)
16-bit bus width)
bus width)
Section 11 Local Bus State Controller (LBSC)
Rev.1.00 Dec. 13, 2005 Page 339 of 1286
REJ09B0158-0100