R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 476

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 12 DDR-SDRAM Interface (DDRIF)
To output the above control signals, write access to address H'FEC0 0308 in SDMR is made in
longwords. Then the above control signals are output to the SDRAM pins. Write data to SDMR is
Don't care.
12.4.6
This register indicates the DDR-SDRAM back-up status. For details, see section 17, Power-Down
Mode.
Note:
Rev.1.00 Dec. 13, 2005 Page 424 of 1286
REJ09B0158-0100
Initial value:
Initial value:
Initial value:
Initial value:
Note: * Depends on the setting of external pin (BKPRST).
Bit
63 to 1
0
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
*
DDR-SDRAM Back-up Register (DBK)
Bit Name

SDBUP
Depends on the setting of external pin (BKPRST).
63
47
31
15
—
—
—
—
R
R
R
R
0
0
0
0
62
46
30
14
—
—
—
—
R
R
R
R
0
0
0
0
Initial
Value
All 0
Undefined
61
45
29
13
—
—
—
—
R
R
R
R
0
0
0
0
60
44
28
12
—
—
—
—
R
R
R
R
0
0
0
0
* R
59
—
43
—
27
—
11
—
R
R
R
R
0
0
0
0
R/W
R
58
42
26
10
—
—
—
—
R
R
R
R
0
0
0
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Back-up Status
Determine whether DDR-SDRAM is or is not being
battery back-up status.
0: Battery back-up
1: Not back-up
57
41
25
—
—
—
—
R
R
R
R
0
0
0
9
0
56
40
24
—
—
—
—
R
R
R
R
0
0
0
8
0
55
39
23
—
—
—
—
R
R
R
R
0
0
0
7
0
54
38
22
—
—
—
—
R
R
R
R
0
0
0
6
0
53
37
21
—
—
—
—
R
R
R
R
0
0
0
5
0
52
36
20
—
—
—
—
R
R
R
R
0
0
0
4
0
51
—
35
—
19
—
—
R
R
R
R
0
0
0
3
0
50
34
18
—
—
—
—
R
R
R
R
0
0
0
2
0
49
33
17
—
—
—
—
R
R
R
R
0
0
0
1
0
SDBUP
47
32
16
—
—
—
—
R
R
R
R
0
0
0
0
*