R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 325

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

10.3.8
USERIMASK is a 32-bit readable and conditionally writable register that sets the acceptable
interrupt level. When addresses in area 7 are accessed by using the MMU’s address translation
function, USERIMASK can be accessed in user mode. Since only USERIMASK is allocated to
the 64-Kbyte page (other INTC registers are allocated to a different area), it can be set to be
accessible in user mode.
Interrupts with priority levels lower than the level set in the UIMASK bits are masked. When the
value H'F is set in the UIMASK bit, all interrupts other than the NMI are masked.
Interrupts with priority levels higher than the level set in the UIMASK bits are accepted under the
following conditions.
• The corresponding interrupt mask bit in the interrupt mask register is cleared to 0 (the interrupt
• The priority level setting in the IMASK bits in also SR is lower than that of the interrupt.
Even if an interrupt is accepted, the UIMASK value does not change.
USERIMASK is initialized to H'0000 0000 (all interrupts are enabled) on return from a power-on
reset or manual reset.
To prevent incorrect writing, the value written to bits 31 to 24 must always be set to H'A5.
Initial value:
Initial value:
is enabled).
R/W:
R/W:
Bit:
Bit:
User Interrupt Mask Level Register (USERIMASK)
R/W
31
15

R
0
0
R/W
30
14

R
0
0
R/W
29
13

R
0
0
R/W
28
12

R
0
0
WKEY (H'A5)
R/W
27
11

R
0
0
R/W
26
10

R
0
0
R/W
25

R
0
9
0
R/W
24

R
0
8
0
R/W
23

R
0
7
0
Rev.1.00 Dec. 13, 2005 Page 273 of 1286
R/W
22

R
UIMASK
0
6
0
Section 10 Interrupt Controller (INTC)
R/W
21

R
0
5
0
R/W
20

R
0
4
0
19


R
R
0
3
0
REJ09B0158-0100
18


R
R
0
2
0
17


R
R
0
1
0
16


R
R
0
0
0