R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 402

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 11 Local Bus State Controller (LBSC)
Rev.1.00 Dec. 13, 2005 Page 350 of 1286
REJ09B0158-0100
Bit
14 to 12 TEDA
11
10 to 8
7
Bit Name

TEDB

Initial
Value
000
0
000
0
R/W
R/W
R
R/W
R
Description
OE/WE Assert Delay A
These bits set the delay time from address output to
OE/WE assertion for the access of first half area of
PCMCIA interface (area n, n = 5 and 6).
000: No wait cycle inserted
001: 1 wait cycle inserted
010: 2 wait cycles inserted
011: 3 wait cycles inserted
100: 6 wait cycles inserted
101: 9 wait cycles inserted
110: 12 wait cycles inserted
111: 15 wait cycles inserted
Reserved
This bit is always read as 0. The write value should
always be 0.
OE/WE Assert Delay B
These bits set the delay time from address output to
OE/WE assertion for the access of second half area of
PCMCIA interface (area n, n = 5 and 6).
000: No wait cycle inserted
001: 1 wait cycle inserted
010: 2 wait cycles inserted
011: 3 wait cycles inserted
100: 6 wait cycles inserted
101: 9 wait cycles inserted
110: 12 wait cycles inserted
111: 15 wait cycles inserted
Reserved
This bit is always read as 0. The write value should
always be 0.