R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 45
R8A77800ANBGAV
Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77800ANBGV.pdf
(1342 pages)
Specifications of R8A77800ANBGAV
Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 1 Overview
Table 1.1
Table 1.2
Section 2 Programming Model
Table 2.1
Table 2.2
Section 3 Instruction Set
Table 3.1
Table 3.2
Table 3.3
Table 3.4
Table 3.5
Table 3.6
Table 3.7
Table 3.8
Table 3.9
Table 3.10
Table 3.11
Table 3.12
Table 3.13
Section 4 Pipelining
Table 4.1
Table 4.2
Table 4.3
Table 4.4
Section 5 Exception Handling
Table 5.1
Table 5.2
Table 5.3
Section 6 Floating-Point Unit (FPU)
Table 6.1
Table 6.2
Table 6.3
SH7780 Features....................................................................................................... 2
Pin Functions .......................................................................................................... 11
Initial Register Values............................................................................................. 35
Bit Allocation for FPU Exception Handling........................................................... 45
Execution Order of Delayed Branch Instructions ................................................... 51
Addressing Modes and Effective Addresses........................................................... 53
Notation Used in Instruction List............................................................................ 57
Fixed-Point Transfer Instructions ........................................................................... 59
Arithmetic Operation Instructions .......................................................................... 61
Logic Operation Instructions .................................................................................. 63
Shift Instructions..................................................................................................... 64
Branch Instructions ................................................................................................. 65
System Control Instructions.................................................................................... 66
Representations of Instruction Execution Patterns.................................................. 74
Instruction Groups .................................................................................................. 84
Combination of Preceding and Following Instructions........................................... 86
Issue Rates and Execution Cycles........................................................................... 88
Register Configuration............................................................................................ 97
States of Register in Each Operating Mode ............................................................ 97
Exceptions............................................................................................................. 102
Floating-Point Number Formats and Parameters .................................................. 131
Floating-Point Ranges........................................................................................... 132
Bit Allocation for FPU Exception Handling......................................................... 140
Floating-Point Single-Precision Instructions ...................................................... 69
Floating-Point Double-Precision Instructions..................................................... 70
Floating-Point Control Instructions .................................................................... 70
Floating-Point Graphics Acceleration Instructions ............................................. 71
Tables
Rev.1.00 Dec. 13, 2005 Page xliii of l
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