R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 328

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 10 Interrupt Controller (INTC)
10.3.9
INT2PRI0 to INT2PRI7 are 32-bit readable/writable registers used to set priorities (levels 31 to 0)
for the on-chip module interrupts. INT2PRI0 to INT2PRI7 are initialized to H'0000 0000 by a
reset.
INT2PRI0 to INT2PRI7 contain five-bit fields that are used to set up to 30 priority levels for the
individual interrupt sources (interrupt requests are masked by settings of H'00 and H'01).
Table 10.5 shows the correspondence between interrupt request sources and bits in INT2PRI0 to
INT2PRI7.
Table 10.5 Interrupt Request Sources and INT2PRI0 to INT2PRI7
Note: A larger value corresponds to a higher priority. The interrupt request is masked when the
Rev.1.00 Dec. 13, 2005 Page 276 of 1286
REJ09B0158-0100
Initial value:
Initial value:
Register
INT2PRI0
INT2PRI1
INT2PRI2
INT2PRI3
INT2PRI4
INT2PRI5
INT2PRI6
INT2PRI7
R/W:
R/W:
Bit:
Bit:
bits are set to H'00 or H'01. For details, see the description above.
On-chip Module Interrupt Priority Registers (INT2PRI0 to INT2PRI7)
31
15


R
R
0
0
30
14


R
R
0
0
TMU channel 0
TMU channel 3
SCIF channel 0
H-UDI
28 to 24
CMT
PCIC (2)
SIOF
FLCTL
29
13


R
R
0
0
R/W
R/W
28
12
0
0
R/W
R/W
27
11
0
0
R/W
R/W
26
10
0
0
20 to 16
TMU channel 1
TMU channel 4
SCIF channel 1
DMAC channels 0
to 5
HAC
PCIC (3)
HSPI
GPIO
R/W
R/W
25
0
9
0
R/W
R/W
24
0
8
0
23


R
R
0
7
0
Bits
12 to 8
TMU channel 2
TMU channel 5
WDT
DMAC channels 6
to 11
PCIC (0)
PCIC (4)
MMCIF
Reserved
22


R
R
0
6
0
21


R
R
0
5
0
R/W
R/W
20
0
4
0
R/W
R/W
19
0
3
0
4 to 0
TMU channel 2
input capture
RTC
Reserved
Reserved
PCIC (1)
PCIC (5)
SSI
Reserved
R/W
R/W
18
0
2
0
R/W
R/W
17
0
1
0
R/W
R/W
16
0
0
0