R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 923
R8A77800ANBGAV
Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77800ANBGV.pdf
(1342 pages)
Specifications of R8A77800ANBGAV
Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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24.3.1
The CMDR registers are six 8-bit registers. A command is written to CMDR as shown in table
24.4, and the command is transmitted when the START bit in CMDSTRT is set to 1. Each
command is transmitted in order form the MSB (bit 7) in CMDR0 to the LSB (bit 0) in CMDR5.
Table 24.4 CMDR Configuration
• CMDR0 to CMDR4
• CMDR5
Register
CMDR0 to
CMDR4
CMDR5
Bit
7 to 0
Bit
7 to 1
0
Command Registers 0 to 5 (CMDR0 to CMDR5)
Bit Name
(Command
argument)
Bit Name
CRC
End
Contents
Command argument
CRC and End bit
Initial value:
Initial value:
Initial
Value
All 0
Initial
Value
All 0
0
R/W:
R/W:
Bit:
Bit:
R/W
R
7
0
7
0
R/W
R/W
R/W
R
R
R/W
6
0
6
0
R
Operation
Write command arguments.
Setting of CRC is unnecessary (automatic calculation).
End bit is fixed to 1 and its setting is unnecessary
(automatic setting).
The read value is 0.
Description
Command arguments
See specifications for the MMC card.
Description
These bits are always read as 0. The write value should
always be 0.
This bit is always read as 0. The write value should
always be 0.
R/W
R
5
0
5
0
(command argument)
CRC
R/W
4
0
4
0
R
R/W
Section 24 Multimedia Card Interface (MMCIF)
R
3
0
3
0
Rev.1.00 Dec. 13, 2005 Page 871 of 1286
R/W
2
0
2
0
R
R/W
R
1
0
1
0
R/W
End
R
0
0
0
0
REJ09B0158-0100
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