R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 998

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section 16 Serial Communication Interface (SCI, IrDA, CRC)
The timing for setting the TEND flag depends on the value of the GM bit in SMR. The TEND flag
generation timing is shown in figure 16.27.
Page 968 of 1448
Figure 16.26 Retransfer Operation in SCI Transmit Mode (Transfer from TDR to TSR is
TDRE
TEND
FER/ERS
I/O data
TXI
(TEND interrupt)
When GM = 1
When GM = 0
Legend:
Ds
D0 to D7
Dp
DE
Note: etu (Elementary Time Unit): Time for transfer of 1 bit
Figure 16.27 TEND Flag Generation Timing in Transmission Operation
Ds
Transfer to TSR from TDR
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
: Start bit
: Data bits
: Parity bit
: Error signal
nth transfer frame
Ds
D0
Not Performed at Retransfer)
D1
D2
[1]
[2]
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
D3
11.0 etu
Transfer to TSR from TDR
12.5 etu
D4
Retransferred frame
D5
D6
D7
H8S/2427, H8S/2427R, H8S/2425 Group
Dp
(DE)
[3]
[4]
Guard
REJ09B0565-0100 Rev. 1.00
time
DE
Ds D0 D1 D2 D3 D4
Transfer to TSR
Transfer
frame n+1
from TDR
Jul 22, 2010