R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 965

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R4F24278NVFQU

Manufacturer Part Number
R4F24278NVFQU
Description
MCU 512K/48K 2.7-5.5V 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24278NVFQU

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
R4F24278NVFQU
Manufacturer:
REALTEK
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Part Number:
R4F24278NVFQU
Manufacturer:
Renesas Electronics America
Quantity:
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H8S/2427, H8S/2427R, H8S/2425 Group
16.4
Figure 16.2 shows the general format for asynchronous serial communication. One frame consists
of a start bit (low level), followed by transfer data, a parity bit, and finally stop bits (high level). In
asynchronous serial communication, the transmission line is usually held in the mark state (high
level). The SCI monitors the transmission line, and when it goes to the space state (low level),
recognizes a start bit and starts serial communication. In asynchronous serial communication, the
communication line is usually held in the mark state (high level). The SCI monitors the
communication line, and when it goes to the space state (low level), recognizes a start bit and
starts serial communication. Inside the SCI, the transmitter and receiver are independent units,
enabling full-duplex communication. Both the transmitter and the receiver also have a double-
buffered structure, so that data can be read or written during transmission or reception, enabling
continuous data transfer.
16.4.1
Table 16.10 shows the data transfer formats that can be used in asynchronous mode. Any of 12
transfer formats can be selected according to the SMR setting. For details on the multiprocessor
bit, refer to section 16.5, Multiprocessor Communication Function.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Serial
data
1
Operation in Asynchronous Mode
Data Transfer Format
Start
bit
1 bit
0
LSB
Figure 16.2 Data Format in Asynchronous Communication
D0
One unit of transfer data (character or frame)
(Example with 8-Bit Data, Parity, Two Stop Bits)
D1
D2
Transmit/receive data
D3
7 or 8 bits
D4
D5
Section 16 Serial Communication Interface (SCI, IrDA, CRC)
D6
MSB
D7
Parity
bit
1 bit
or none
0/1
Stop bit(s)
1
1 or
2 bits
1
Idle state
(mark state)
1
Page 935 of 1448

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