R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 623

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
• P25/WAIT-B/PO5-A/TIOCB4-A/TMO1-A
• Modes 1, 2, 4, and 3, 5, 7 (EXPE = 1)
• Mode 3, 5, 7 (EXPE = 0)
Notes: 1. TIOCB4-A input when MD3 to MD0 = B'0000 or B'01xx and IOB3 to IOB0 = B'10xx.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
WAITE
TPU channel 4
settings
OS3 to OS0
P25DDR
NDER5
Pin function
WAITE
TPU channel 4
settings
OS3 to OS0
P25DDR
NDER5
Pin function
The pin function is switched as shown below according to the combination of the operating
mode, bit EXPE, bit WAITE in BCR of the bus controller, TPU channel 4 settings (by bits
MD3 to MD0 in TMDR_4, bits IOB3 to IOB0 in TIOR_4, and bits CCLR1 and CCLR0 in
TCR_4), bits OS3 to OS0 in TCSR_1 of the 8-bit timer, bit NDER5 in NDERL of the PPG,
bits PPGS, TPUS, and TMRS in PFCR3, bit WAITS in PFCR4, and bit P25DDR.
2. PO5-A output when the PPGS bit in PFCR3 is 0.
3. TIOCB4-A input/output when the TPUS bit in PFCR3 is 0.
4. TMO1-A output when the TMRS bit in PFCR3 is 0.
5. WAIT-B input when the WAITS bit in PFCR4 is 1.
(1) in table
TIOCB4-A
(1) in table
TIOCB4-A
output*
output*
below
below
⎯
⎯
⎯
⎯
⎯
⎯
3
3
P25 input
P25 input
0
⎯
0
⎯
0
(2) in table below
P25 output
All 0
1
0
P25 output
TIOCB4-A input*
All 0
TIOCB4-A input*
⎯
1
0
(2) in table below
output*
PO5-A
1
1
PO5-A output*
2
1
*
1
1
1
*
3
TMO1-A
Not all 0
output*
3
⎯
⎯
1
2
4
Section 11 I/O Ports
⎯
Page 593 of 1448
TMO1-A
Not all 0
output*
WAIT-B
input*
⎯
⎯
⎯
⎯
⎯
4
5