R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 1179

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R4F24278NVFQU

Manufacturer Part Number
R4F24278NVFQU
Description
MCU 512K/48K 2.7-5.5V 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24278NVFQU

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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H8S/2427, H8S/2427R, H8S/2425 Group
23.6.1
This command reads the flash memory.
Write H'FFxx in the first bus cycle to shift the flash memory into the read array mode. Specify the
target read address in the next bus cycle after setting the CBIDB bit in FLMCR1 to 1, and data is
read from the address in 16-bit units.
As the flash memory stays in the read array mode until another command is issued, multiple
addresses can be read in sequence.
23.6.2
This command reads the status register.
Write H'70xx in the first bus cycle, and the status register can be read in the second bus cycle
(refer to section 23.8, Status Register). Specify an even address in the user ROM, data flash, or
user boot ROM to read the status register.
Do not issue this command in the EW1 mode.
23.6.3
This command clears the status register.
Write H'50xx in the first bus cycle, and the FMERSF and FMPRSF bits in FLMSTR are cleared to
0.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Read Array
Read Status Register
Clear Status Register
Section 23 Flash Memory
Page 1149 of 1448

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