R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 651

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
[Legend]
⎯:
x:
• P62/IRQ10-A/TEND0/TEND1/TEND4/TMCI0-A
Notes: 1. IRQ10-A input when the ITS10 bit in ITSR is 0.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
DMAC settings
DMCOMMD
RSEL5, RSEL3,
RESEL2
TEE1
DMA_SEL1
DMAECRS1.TEE
DMAECRF5.TEE
Output function
DMAC settings
P62DDR
Pin function
The pin function is switched as shown below according to the combination of bit DMCOMMD
in MDLCFGCR, bits RSEL4, RSEL1, and RSEL0 in DRSEL, bit TEE0 in DMATCR, bit TEE
in DMAECRS0, and bit TEE in DMAECRF4 of the DMAC, bits TMRS and DMA_SEL0 in
PFCR3, bit P62DDR, and bit ITS10 in ITSR of the interrupt controller.
Not used as the DMAC pin (can be used as an I/O port).
Don't care
2. When used as the external clock input pin for the TMR, its pin function should be
3. TMCI0-A input when the TMRS bit in PFCR3 is 0.
specified to the external clock input by the CKS2 to CKS0 bits in TCR_0.
B'000
(1)
⎯
x
x
x
x
P62 input
0
(1) in table below
(1)
⎯
0
x
x
x
B'100
TEND5
P62 output
output
(4)
1
1
x
x
x
1
IRQ10-A interrupt input*
(1)
⎯
0
x
x
x
TMCI0-A input*
B'01x
(2) in table
TEND0
TEND3
output
output
below
(3)
⎯
1
x
x
x
2
*
(1)
⎯
0
x
3
(3) in table
1
TEND1
0
output
below
TEND1
⎯
output
(2)
1
x
0
x
x
Section 11 I/O Ports
(1)
⎯
0
Page 621 of 1448
(4) in table
TEND4
output
below
1
x
⎯
TEND5
output
(4)
1