R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 362

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section 8 DMA Controller (DMAC)
8.3.1
MAR is a 32-bit readable/writable register that specifies the source address (transfer source
address) or destination address (transfer destination address) of channels 0, 1, 2, and 3.
Whether MAR functions as the source address register or the destination address register can be
selected by means of the DTDIR bit in DMACRS.
MAR is incremented or decremented each time a byte or word transfer is executed, so that the
address specified by MAR is automatically updated.
All bits in MAR are initialized to 0 at a reset.
8.3.2
IOAR is a 16-bit readable/writable register that specifies the lower 16 bits of the source address
(transfer source address) or destination address (transfer destination address). The upper 8 bits of
the transfer address are automatically set to H'FF.
Whether IOAR functions as the source address register or the destination address register can be
selected by means of the DTDIR bit in DMACRS.
IOAR is not incremented or decremented each time a data transfer is executed, so the address
specified by IOAR is fixed.
All bits in IOAR are initialized to 0 at a reset.
Page 332 of 1448
Memory Address Register (MAR)
I/O Address Register (IOAR)
H8S/2427, H8S/2427R, H8S/2425 Group
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010