R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 11

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.4
5.5
5.6
5.7
5.8
5.9
Section 6 Interrupt Controller ............................................................................115
6.1
6.2
6.3
6.4
6.5
6.6
6.7
5.3.1
5.3.2
5.3.3
Trace Exception Handling ................................................................................................. 109
Interrupt Exception Handling ............................................................................................ 110
Trap Instruction Exception Handling................................................................................. 111
Illegal Instruction Exception Handling .............................................................................. 112
Stack Status after Exception Handling............................................................................... 113
Usage Note......................................................................................................................... 114
Features.............................................................................................................................. 115
Input/Output Pins............................................................................................................... 117
Register Descriptions ......................................................................................................... 118
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
Interrupt Sources................................................................................................................ 135
6.4.1
6.4.2
Interrupt Exception Handling Vector Table....................................................................... 136
Interrupt Control Modes and Interrupt Operation .............................................................. 144
6.6.1
6.6.2
6.6.3
6.6.4
6.6.5
Usage Notes ....................................................................................................................... 152
6.7.1
6.7.2
6.7.3
6.7.4
6.7.5
6.7.6
Reset Exception Handling .................................................................................... 106
Interrupts after Reset............................................................................................. 108
On-Chip Peripheral Functions after Reset Release............................................... 108
Interrupt Control Register (INTCR) ..................................................................... 119
Interrupt Priority Registers A to N (IPRA to IPRN)............................................. 120
IRQ Enable Register (IER) ................................................................................... 122
IRQ Sense Control Registers H and L (ISCRH, ISCRL)...................................... 124
IRQ Status Register (ISR)..................................................................................... 130
IRQ Pin Select Register (ITSR)............................................................................ 131
Software Standby Release IRQ Enable Register (SSIER) .................................... 134
External Interrupts ................................................................................................ 135
Internal Interrupts ................................................................................................. 136
Interrupt Control Mode 0...................................................................................... 145
Interrupt Control Mode 2...................................................................................... 147
Interrupt Exception Handling Sequence ............................................................... 149
Interrupt Response Times ..................................................................................... 150
DTC and DMAC Activation by Interrupt ............................................................. 151
Conflict between Interrupt Generation and Disabling .......................................... 152
Instructions that Disable Interrupts....................................................................... 153
Times when Interrupts are Disabled ..................................................................... 153
Interrupts during Execution of EEPMOV Instruction .......................................... 153
Change of IRQ Pin Select Register (ITSR) Setting .............................................. 154
IRQ Status Register (ISR)..................................................................................... 154
Page xi of xxx