R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 336

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section 7 Bus Controller (BSC)
(b) Normal space access after a continuous synchronous DRAM space write access
If a normal space read cycle occurs after a continuous synchronous DRAM space write access
while the ICIS2 bit is set to 1 in BCR, idle cycle is inserted at the start of the read cycle. The
number of states of the idle cycle to be inserted is in accordance with the setting of bit IDLC. It is
not in accordance with the DRMI bit in DRACCR.
Figure 7.92 shows an example of idle cycle operation when the ICIS2 bit is set to 1.
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Figure 7.92 Example of Idle Cycle Operation after Continuous Synchronous DRAM Space
Precharge-sel
DQMU, DQML
Address bus
HWR, LWR
Data bus
CKE
CAS
RAS
WE
RD
φ
Write Access (IDLC = 0, ICIS1 = 0, SDWCD = 1, CAS Latency 2)
address 1
PALL ACTV
Column
T
Continuous synchronous
DRAM space write
p
address
address
Row
Row
T
r
Column address 1
NOP WRIT
T
c1
T
c2
Idle cycle
T
i
External address
External address
External space read
T
1
High
NOP
T
2
H8S/2427, H8S/2427R, H8S/2425 Group
T
3
READ
Column address 2
Synchronous
DRAM space read
T
REJ09B0565-0100 Rev. 1.00
c1
T
Cl
NOP
T
c2
Jul 22, 2010