R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 822

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section 12 16-Bit Timer Pulse Unit (TPU)
(b) Example of Input Capture Operation
Figure 12.10 shows an example of input capture operation.
In this example both rising and falling edges have been selected as the TIOCA pin input capture
input edge, falling edge has been selected as the TIOCB pin input capture input edge, and counter
clearing by TGRB input capture has been designated for TCNT.
12.4.2
In synchronous operation, the values in multiple TCNT counters can be rewritten simultaneously
(synchronous presetting). Also, multiple of TCNT counters can be cleared simultaneously
(synchronous clearing) by making the appropriate setting in TCR.
Synchronous operation enables TGR to be incremented with respect to a single time base.
Channels 0 to 5 and 6 to 11 can all be designated for synchronous operation.
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H'0180
H'0160
H'0010
H'0005
H'0000
TIOCA
TGRA
TIOCB
TGRB
TCNT value
Synchronous Operation
Figure 12.10 Example of Input Capture Operation
H'0005
H'0160
H'0180
Counter cleared by TIOCB
input (falling edge)
H8S/2427, H8S/2427R, H8S/2425 Group
REJ09B0565-0100 Rev. 1.00
H'0010
Jul 22, 2010
Time