R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 379

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
8.3.12
DRSEL controls reading and writing of common registers DMABCR and DMATCR. DRSEL
must be set before reading from or writing to DMABCR and DMATCR.
DRSEL can be written to only in common register enabled mode (DMCOMMD = 1).
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Bit
2
1
0
Bit
7, 6
5
Bit Name
⎯
TEE
⎯
Bit Name
⎯
RSEL5
DMA Register Select Register (DRSEL)
Initial Value
0
0
0
All 0
0
Initial Value
R/W
R
R/W
R
R/W
R
R/W
Description
Reserved
This bit is always read as 0 and cannot be
modified.
Transfer End Pin Enable
Enables or disables output from the transfer end
pin (TEND).
0: TEND pin output is disabled
1: TEND pin output is enabled
Reserved
This bit is always read as 0 and cannot be
modified.
Description
Reserved
These bits are always read as 0 and cannot be
modified.
Register Select 5
Setting this bit to 1 enables channel 5 to be
controlled through DMABCR and DMATCR.
When this bit is set to 1, setting the RSEL2 or
RSEL3 bit to 1 will be ignored.
Writing to this bit is ignored when channel 2, 3, or
5 is operating.
Section 8 DMA Controller (DMAC)
Page 349 of 1448