R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 371

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
Table 8.1 shows the locations of the setting information.
Table 8.1
8.3.7
SAR is a 32-bit readable/writable register that specifies the source address (transfer source
address) of channels 4 and 5.
SAR is incremented or decremented each time a byte or word transfer is executed, so that the
source memory address is automatically updated.
All bits in SAR are initialized to 0 at a reset.
8.3.8
DAR is a 32-bit readable/writable register that specifies the destination address (transfer
destination address) of channels 4 and 5.
DAR is incremented or decremented each time a byte or word transfer is executed, so that the
destination memory address is automatically updated.
All bits in DAR are initialized to 0 at a reset.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Address
4n
4n + h'2
4n + h'4
4n + h'6
4n + h'8
4n + h'a
4n + h'c
4n + h'e
4n + h'10
4n + h'12
Source Address Register (SAR)
Destination Address Register (DAR)
Register Setting Information Location
Register (Channels 0, 1, 2, and 3)
MARH
MARL
IOAR
ETCR
DMACRS
DMAECRS
DMARCRH
DMARCRL
⎯
⎯
Don't care
Don't care
Register (Channels 4 and 5)
SARH
SARL
DARH
DARL
ETCRA
ETCRB
DMACRF
DMAECRF
DMARCRH
DMARCRL
Section 8 DMA Controller (DMAC)
Don't care
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