R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 754

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section 11 I/O Ports
11.17.3 Port J Register (PORTJ)
PORTJ shows the pin states of port J. PORTJ cannot be modified.
Note:
11.17.4 Port J Open Drain Control Register (PJODR)
PJODR specifies the output type of each port J pin.
Page 724 of 1448
Bit
7 to 3
2
1
0
Bit
7 to 2 ⎯
1
0
*
Bit Name
PJ1ODR
PJ0ODR
Bit Name
⎯
PJ2
PJ1
PJ0
Determined by the state of pins PJ0 to PJ2.
Initial Value
Undefined
⎯*
⎯*
⎯*
Initial Value
All 0
0
0
R/W
⎯
R
R
R
R/W
⎯
R/W
R/W
Description
Reserved
If these bits are read, they will return an undefined
value.
[PLQP0144KA-A package]
The pin states are read.
[PTLG0145JB-A package]
Reserved. If this bit is read, it will return an
undefined value.
If this register is read, the PJDR values are read for
the bits with the corresponding PJDDR bits set to 1.
For the bits with the corresponding PJDDR bits
cleared to 0, the pin states are read.
Description
Reserved
These bits are always read as 0. Only the initial
values should be written to these bits.
Setting a PJODR bit to 1 makes the corresponding
pin an NMOS open-drain output pin, while clearing
a PJODR bit to 0 makes the corresponding pin a
CMOS output pin.
H8S/2427, H8S/2427R, H8S/2425 Group
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010